AMD Instinct MI210
The MI210 brings CDNA 2 architecture to PCIe form factor with 64GB HBM2e memory. A practical choice for datacenter deployments without OAM infrastructure requirements.
VRAM
64 GB
Memory
HBM2e
Bandwidth
1,638 GB/s
FP16
181 TF
TDP
300 W
Memory and compute
Architecture and power
Notes
Single-GCD PCIe card for mainstream datacenter deployment.
Models that may fit on AMD Instinct MI210
Estimates based on INT8 quantization. Actual fit depends on framework and batch size.
More GPUs by AMD
The manufacturer's other cards in the catalog, largest memory first, with bandwidth and power where published.
Frequently asked questions about AMD Instinct MI210
Answered from the entry's own figures: memory, which models fit, bandwidth, power and the card's class.
AMD Instinct MI210 has 64 GB of HBM2e at 1,638 GB/s. At INT8 a model's weights take about one byte per parameter, so the card holds roughly a 51B-parameter model with room for context; larger models need several cards or a lower precision.
From the catalog's estimates at INT8, Llama 3_3 Nemotron Super 49B V1, Gemma 4 31B IT, Llama Nemotron Embed VL 1B V2 and GLM Z1 9B 0414 fit on a single AMD Instinct MI210 with their default context. The list on this page shows the estimated memory each takes; the capacity planner sizes any model against this card for your own context length, batch size and request rate.
1,638 GB/s. Bandwidth bounds how fast a model generates tokens, because every token reads the whole set of weights and the KV cache from memory; at this rate a 51B model at INT8 could be read on the order of 32 times a second on one card, before batching and framework efficiency.
AMD Instinct MI210 has a TDP of 300 W, with a maximum of 300 W, in the PCIe form factor. Budget the TDP per card plus host overhead when sizing a server's power and cooling.
AMD Instinct MI210 is a datacenter accelerator, meant for servers and multi-GPU serving, built on the CDNA 2 architecture and released in 2022. It has no multi-GPU interconnect, so a model must fit on one card or be split over the slower PCIe bus.
Specifications from the manufacturer's published material; a figure that is not published is shown as such, and a derived one is explained in the notes.
Added Jan 27, 2026 · Last updated Jan 27, 2026
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